Abstract:In this work, the top-gate and top-contact thin film transistors (TFT) were prepared with dip-coated amorphous aluminum-indium-zinc-oxide (a-AIZO) as the active layer and poly (methyl methacrylate) (PMMA) as the gate insulator layer. And then the effect of annealing temperature of the active layer on the TFT’s performance was studed. It is found that the impurities in the active layer due to the incompleted thermal decomposition of dehydroxylation under a lower post-temperature (e.g. 300 and 350℃) not only strongly obstruct the formation of metal oxide, but also produce the trap states in the active layer and at the active-layer/dielectric-layer interface. This trap state makes electron carriers be trapped or scattered, resulting in deterioration of the electrical performance of devices including the mobility, on/off current ratio and subthreshold swing. Overall, the a-AIZO TFTs fabricated at annealing temperature higher than 400℃ exhibit optimum device characteristics, with a high saturated mobility (>20cm2/(V·s)), a small subthreshold swing (<0.5V/decade), and on/off current ratio of higher than 104.