To improve the signal noise ration (SNR) of the sensing system in push-broom mode, a new kind of CMOS-APS ROIC is proposed, which can realize time-delay-integration (TDI) function in analog voltage domain. In contrast with the TDI in digital domain, the TDI in analog domain can get lower noise and slower ADC readout rate. The ROIC is mainly composed of pixel arrays, TDI accumulation arrays, charge amps, S&H units and row column selection logic. Under the control of the timing sequence generated by the FPGA out-of-chip, the circuit can realize the accumulation of TDI signal voltage. The noise source from the main parts of the architecture was analyzed, and the corresponding reduction method was proposed. The whole architecture was taped out in 5μm technology of CSMC. Finally, some performance evaluation parameters of the ROIC were measured with the Labview testbench, and the relationship between SNR and the number of TDI was verified.